add $r10, $r3, $r4   # R[10] = R[3] + R[4]

Recall that the CPU processes a 32-bit machine code instruction that's translated from the assembly code above, and encoded in that instruction are the 3 registers. In particular, each of the register is encoded using 5 bit UB.

For example, register 3 is encoded as 00011 and register 4 is encoded as 00100.

We're going to create a circuit called a register file. This circuit contains all 32 user-visible integer registers. We could create one for floating point, but that's not absolutely necessary. You'll still understand how a CPU works if we leave out floating point registers (they work pretty much like the integer registers).

We want the ability to access both registers (in this case, $r3 and $r4) at the same time. That way, we can save time. If we have to access one register at a time, it would slow down the execution of the instruction.

So, we have two sets of inputs to our register file, which specify which two registers we want. They can even be the same register.

Here's how our initial register file looks:

We've labelled the inputs as SRC 1 Index and SRC 2 Index, which are 5 bits each. We can think of registers 3 and 4 and source registers, and their result is stored in the destination register (in our example, it's $r10).

The DST Index comes from the instruction itself, just as SRC 1 Index and SRC 2 Index did. In our example, that's the encoding of $r10 (which is 01010).

It turns out we need one more input, in addition to DST Index and DST Data. Even though this particular instruction updates a destination register, not every instruction does so. We want to control when a register value is updated in the register file.

This control signal is called RegWrite and it's only 1 bit. If RegWrite = 1, then a write is performed on the register specified by DST Index, using the 32-bit data given by DST Data. If RegWrite = 0, then no write is performed. Both DST Index and DST Data are ignored.

Which reminds me, we have to talk about a clock. The register file also has a clock. The diagram below is now complete.

Why no RegRead?

The reason is simple. SRC 1 Data and SRC 2 Data are sent to the outside world (i.e., to other parts of the CPU). Those parts can simply choose to ignore the data, if they don't need it.

However, when you are performing a write on a register using DST Index and DST Data, you are updating the register file. The register file can't very well ignore that. To give it the option to ignore it, we must include RegWrite.

SRC 1 Data and SRC 2 Data are output with a small delay given a change in SRC 1 Index and SRC 2 Index. If you're curious about the implementation (or, more precisely, if you're curious about an implementation), look at the MAR from the previous set of notes.

You can see that it's hooked up to tri-state buffers. Once the tri-state buffers are enabled (which doesn't require a clock), the output is sent to the address bus.

Similarly, SRC 1 Index and SRC 2 Index enable two 32-bit tri-state buffers. In particular, they enable the tri-state buffers to the registers specified by SRC 1 Index and SRC 2 Index.

Again, this part does not need a clock. If SRC 1 Index and SRC 2 Index both change, then the tri-state buffers associated with the new registers are enabled (while the previous ones are disabled), and they are output after a small delay.

Writing Requires a Clock

Reading a value from the register file does not require a clock. Once you specify the registers you want to read (i.e., SRC 1 Index and SRC 2 Index), then there's only a small delay before the data comes out of the register file via SRC 1 Data and SRC 2 Data.

Writing a value to the register file does require a clock. You can specify which register you want to write to (using DST Index), the data you want to write (using DST Data) and whether you really want to write to the register file or not (using RegWrite). This action takes place on the negative edge of the clocks. (Positive edges are used to transition in the finite state machine and set up control signals for ALU, MUX, tri-state buffers, etc).

The word "multiplexer" probably doesn't mean much to you. If anything, it sounds like a place where you can go watch movies. A better name for a multiplexer might be input selector.

A multiplexer picks one of several inputs and directs it to the output. We'll see this in more detail.

What happens then? For example, supposed you want to have a 3-1 MUX. How many control bits are needed?

We use the same formula as before: ceil( lg 3 ) = 2.

lg 3 evaluates to a value that is greater than 1, but less than 2. When we take the ceiling of that value, we get 2.

With 2 controls bits, we can specify up to four different inputs. The problem? We only have three inputs. What do we do when the user tries to specify input c_1..0 = 11? This would normally specify that you want z = x₃, but with only 3 inputs, z = x₃ doesn't exist.

The answer is simply not to care. Ideally, if a 3-1 MUX is being used in a circuit, the rest of the circuit does not set the control bits, c_1..0 = 11.

However, since we can't prevent that from happening, we simply let the actual designer of the 3-1 MUX pick any value for that.

This solution of placing a don't care value for MUXes with k inputs, where k is not a power of 2, is fairly common. If you want, just set the value to x₀.

The following is an implementation of a 2-bit 2-1 MUX. In this MUX, you can choose between x_1..0 and y_1..0 using a control bit c. You can implement this kind of MUX using 2 1-bit 2-1 MUXes. In general, you can create a k-bit m-1 MUX, using k 1-bit m-1 MUX, using a similar strategy as shown below.

As you can see there are two sets of data inputs: x₁x₀ (which we abbreviate as x_1..0) and y₁y₀ (which we abbreviate as y_1..0). There is one control bit since this is still a 2-1 MUX. There are two bits of output: z_1..0. Inside the black box is the implementation, which include two 1-bit 2-1 MUX.

We could have called this a 4-2 MUX, but it doesn't make it nearly as clear that you have 2 choices to pick from. 2-bit 2-1 MUX indicates that there are 2 choices.

An Exercise

Even though a DeMUX appears to be the opposite of a MUX (an output selector versus an input selector), surprisingly, it's not used nearly as often as MUXes. MUXes seem to find more uses than a DeMUXes.

Suppose you have a 1-4 DeMUX. You want to pick one of four possible outputs. How many control inputs do you need? Again, it's the same idea of labelling one of four items. You need ceil( lg 4 ) = 2 bits.

The following is a diagram of a 1-4 DeMUX.

As you can see, x is directed to one of the outputs. The choice of which output it is directed to is basically the same as it is for the MUX. We treat c_1..0 as a 2-bit UB number, which specifies the subscript of the output we want the input to be directed to.

What happens to the remaining outputs? For example, if we decide to direct x to z₂, what values should the other 3 outputs have? Our solution is to have all of the remaining outputs set to 0.

This means that a DeMUX can have, at most one output that is 1. The remaining outputs are 0. This may not always be the behavior you want, but it's easy enough to design a DeMUX such that the remaining outputs are, say, 1.

A MUX is also a combinational logic device meaning that once the input to the MUX changes, then after a small delay, the output changes. Unlike a register, a MUX does not use a clock to control it.

A MUX is very handy in a CPU because there are many occasions where you need to select one of several different inputs to some device. Usually, these MUXes are 32-bit m-1 MUX for some value of m.

A DeMUX is an output selector, letting you pick one of N outputs to direct an input to.

Combinational logic devices implement Boolean functions. A Boolean function has k bits of input and m bits of output, where k >= 0 and m >= 1.

Any combinational logic device can be constructed out of AND gates, OR gates, and NOT gates. However, they can also be completely constructed using only NAND gates, or using only NOR gates.

You can describe the behavior of a combinational logic device using a truth table.

Control inputs let you control what the device does. For example, if you have a blender, there are often several buttons to let you decide how you want to chop the food. Or a washing machine has several choices you can pick depending on the kind of clothes you are going to wash. It lets you select temperature, time, and the amount of agitation.

If you have N choices for the different operations that a combinational logic device can perform, then you need ceil( lg N ) control bits to specify the operation. This result should be familiar, because we discussed it in a previous set of notes.

Some combinational logic devices do not have control inputs. They only have data inputs. However, many of the ones we consider do have them. The combinational logic device doesn't really distinguish between data and control inputs. To the device, it's all just inputs.

However, as humans who use these devices, it's useful to think of these two categories.

Notice that this behavior is different from a register. A register is a sequential logic device, which can only change its value at a clock edge. A combinational logic device can change its outputs as soon as the inputs change (plus a little delay from input to output).

Again, it's useful to think that values are continuously being fed to a combinational logic device and the outputs change as the inputs change.

Here's another useful analogy. Suppose you have a flashlight that can shine red light or green light. There's a switch on the flashlight that allows you to switch between red and green.

Suppose you have a light sensor. If the light sensor detects green light, it plays the musical note of "A". If it detects red light, it plays the musical note of "C". If it detects no light, then it doesn't play anything.

So, you shine green light onto the sensor, and it begins to play the note "A". Then, you switch it to red light, and there is a small delay, before it starts to play the note "C".

Then, you switch it back to green light, and, after a tiny delay, it goes back to playing "A".

Finally, you turn the flashlight off, and after a small delay, it stops playing. Notice that as long as the flashlight was shining on the sensor, it played something, but when it was turned off, it stopped playing. The flashlight had to continuously emit red or green light for the sensor device to play a note.

This is one way to think about how circuits work. There is a continuous flow of current into the device. The current's voltage is either interpreted as 0 or 1, and can be changed. If the input changes, then after a small delay, the output current is updated to the new value.

As you can see, there are k bits of data input, n bits of control inputs, and m bits of output.

When the inputs change, then there is a small delay before the output changes. We see this in the next section.

Initially, we have two inputs, x and y, whose value are both 0. The output z is 0, as well. Then we change x to 1, and the output z, after some delay becomes 1. Then, we change y to 1, and after some delay, the output z becomes 0.

Here's a timing diagram to illustrate the behavior.

As you can see, at time (1), x changes to 1. However, it takes until time (2) for z to change to 1. Then, at time (3), y changes to 1, but it takes until time (4) for z to change back to 0.

The amount of time for z to change is called the circuit delay, and we write it as "delta" T. This time is usually very short. Nevertheless, it's not zero.

Because it's not zero, it affects the way circuits are designed. The smaller the value of delta T, the quicker we can make the circuit.

For example, suppose you have an AND gate. If both inputs are 0, then one input is changed to 1, then the output is still 0. However. in those cases where the output changes, there is a delay.

A combinational logic device can be specified by using a truth table, and is an implementation of a Boolean function. Any Boolean function can be implemented using a combination of AND, OR, and NOT gates (or only using NAND gates, or only using NOR gates).

We claim that garbage would occur, even if two devices attempt to pump the same kind of soda (i.e., both red or both green). This probably doesn't happen in reality. That is, if two devices attempt to set the value of a wire to 1, the wire is most likely transmitting a 1 without problem.

Nevertheless, we want to avoid this situation. It should be the case that only one device writes a value to the wire, at any given time. There should be no reason for two devices writing to a wire or bus at the same time. Certainly, we expect devices to write to the wire at different times. The idea of a bus, after all, is that it is a shared medium of communication, to be used by all devices connected to the bus.

The outputs of registers are going to be connected to busses, and often there may be more than one register connected to a bus. We want to be able to control when a register writes a value to a bus.

How can we do this? Let's think of our analogy. Suppose we have many small pipes hooked to a much larger pipe. For example, we might have 3 small pipes hooked up to a large pupe.

Suppose each small pipe is connected to a device which pumps soda. We want to make sure only one device is pumping soda into the large pipe. Unfortunately, each device is always pumping soda, which means all three devices are trying to pump soda.

If we can't turn off the device, how do we prevent the soda from being pumped into the large pipe?

One idea is to have some sort of device in the small pipe which can be opened or closed. When the device is closed, even though the device attempts to pump soda, it can't make it to the large pipe.

This device is usually called a valve. If the valve is open, soda can be pumped through. If the valve is closed, no soda can be pumped through.

Here's a diagram to illustrate the concept.

It looks very much like an inverter (a NOT gate) except it's missing a circle at the right side (where z is located). This tiny circle usually indicates that the device is inverting the input, x.

Unlike an inverter, a tri-state buffer has two inputs. It has a data input (labelled x) and a control input (labelled c).

When c = 1, the valve is open, and the output z is the same as the input x. Essentially, it lets the input value flow to the output. This input value can be 0, 1, Z, or ? (garbage).

When c = 0, the valve is closed, and the output z = Z, which means no electrical current (i.e., no 0's and 1's) is flowing through.

Regular Buffers

Over distance, a signal begins to lose strength. There are devices called repeaters which are meant to boost the strength of the signal. That's essentially what a plain buffer is.

However, we're interested in tri-state buffers, primarily because they behave like valves. They allow us to control which devices can write to a bus.

x is the data input. c is the control input, which turns on and off the valve. z is the output. Z (which is capitalized), means "no current", which, in our analogy, is "no soda" being pumped through.

We'd like to be able to use a single bit to control when, say, a register is allowed to write its 32 bit contents to a bus. If this bit is 1, then all 32 bits are written to the bus. If the bit is 0, then none of the bits are sent to the bus.

This can be easily implemented using 32 tri-state buffers.

The example below shows how to implement a 4-bit tri-state buffer using 4 1-bit tri-state buffers. It's easy to extend this idea to 32 bits.

There is a bus containing 4 wires going into the "black box" (we get to see the inside of the black box) labelled x_3..0.

Inside the black box, we split the bus into individual wires labelled x₀ through x₃. Each wire goes through a 1-bit tri-state buffer.

There's a single control bit c coming from the outside world, and this one bit is attached to each of the four tri-state buffers. So, either all four tri-state buffers let the input values go through or none of them go through.

As you can see, the implementation is pretty simple.

Usually, we use 32-bit tri-state buffers, which have 32 data inputs, 32 outputs, but a single control bit. The implementation is shown above.

For example, a map models the roads in, say, a city. However, it doesn't tell you how much traffic is on each road, or where there are stop lights, or what offices or stores are near those roads. That information is either too difficult or too time-sensitive (i.e., it would get obsolete fast) to include in a map.

Our model of a computer is very simple, yet it has all the essential elements we need to understand these notes.

Here's an picture of our "computer".

The CPU contains registers and an ALU. The memory contains data and instructions. The CPU is connected to the memory through two busses: a 32 bit data bus and a 32 bit address bus.

When you first learned about arrays, you learned that an array has an index, and it has contents at that index. It's possible to confuse the two. After all, the index and the contents at that index are often numbers.

We don't use the word index to refer to an element at a location. Instead, we use the word address.

Memory is often said to be byte-addressable, which means that each address stores one byte. We could also talk about nybble-addressable (each address stores one nybble, which is 4 bits), or perhaps a word-addressable memory (each address stores one word, which we define to be 32 bits). However, it's very rare to see anything besides byte-addressable memory.

Most people would agree that you break the quantity into 4 bytes, and store them at four consecutive addresses in memory.

In particular, suppose you had a 32-bit word denoted as B_31..0. You can divide this into four bytes: B_31..24, B_23..16, B_15..8, and B_7..0. We'll call B_31..24 the most significant byte, or the high byte. We'll call B_7..9 the least significant byte, or the low byte.

Let's say we store these four bytes at addresses 1000, 1001, 1002, and 1003.

However, there are two (common) ways to store four consecutive bytes. You can store high byte at the smallest address, i.e,, store B_31..24 at address 1000 (and store B_23..16 at address 1001, B_15..8 at address 1002, and B_7..0 at address 1003). This is called big-endian, because the big end (the high byte) is stored first.

Or you can store low byte at the smallest address, i.e,, store B_7..0 at address 1000 (and store B_15..8 at address 1001, B_23..16 at address 1002, and B_31..24 at address 1003). This is called little-endian, because the little end (the low byte) is stored first.

Even though a word takes up four addresses, we usually refer only to the smallest address when indicating the location in memory. So you simply have to be aware that you may be storing more than one byte, and thus more than one address in memory is being used.

Endianness affects any quantity larger than a byte. So halfwords (two bytes) have endianness, as do doublewords (eight bytes).

A word-aligned address is an address that is divisible by 4. Equivalently, you can say it's an addresss that is a multiple of 4, or an address whose low two bits A_1..0 = 00. That is, it's low two bits are both 0. (See why that's the same as being divisible by 4).

Halfwords are half-word aligned. This means half-words must be stored at addresses divisible by 2. This is equivalent to saying the address of a half-word aligned quantity, when written in binary, must have its least significant bit set to 0. That is, A₀ = 0.

Doublewords are double-word aligned. This means double-words must be stored at addresses divisible by 8. This is equivalent to saying the address of a double-word aligned quantity, when written in binary, must have its low 3 bits set to 0. That is, A_2..0 = 000.

In general, if you have 2^k bytes, it must be stored at address that is divisible by 2^k and that bits A_k-1..0 = 0^k-1.

Some CPUs do not have word alignment, but nearly all RISC CPUs do, so it's important to understand the concept.

What is memory used for? It is used to store information. In particular, it can store:

• data This can be integers, floating point numbers, MPEGS, JPEGs, or any variety of data formats. It can be the internal representation of objects, etc.

• instructions One of the surprising ideas in computers is the idea that instructions can also be stored in memory. A long time ago, people thought of computers with highly specific purposes (for example, computing trajectories of missiles), and didn't think of it as general purpose. By allowing instructions to be "soft", i.e., represented just like data, it can be manipulated like data too.

• garbage Not every address stores meaningful data. Some of it is merely 0's and 1's without meaning.

In general, certain sections of memory are reserved for data, while other sections are reserved for instructions. Nevertheless, there's no inherent information stored in the bytes that indicate it's an instruction vs. data.

This has lead people to say "Information = Bits + Context". That is, bits do not have any meaning, except in certain contexts. Thus, if the CPU "thinks" there is an instruction at a certain address, then it will treat the binary value at that address as an instruction, even if it's not a truly meaningful instruction (i.e., it could be a valid instruction, but not within a meaningful program).

Thus, the CPU distinguishes between data, instructions, and garbage by context, not by any special tagging of the bytes to indicate what is stored. This means, in general, if you could inspect the bytes in memory, it might be difficult to tell if those bytes are data or instructions, or even if you could tell it was data, it would be hard to tell what kind of data it is.

To load bytes means to copy some bytes from memory to a register located on the CPU. This is the same as reading from memory to the CPU.

To store bytes means to copy some bytes from a register in the CPU to a memory location specified by a memory address. This is the same as writing from the CPU to memory.

In particular, we're going to describe the pins associated with a memory chip. Pins are used for inputs and outputs of a chip. Some pins are for inputs (receiving information from the outside world). Some are for outputs (providing information to the outside world). Some are bidirectional (they do both).

First, we know that the CPU needs to access memory for either load or store. To do this, it needs to provide an address. So, we're going to assume memory has 32 bits of input for an address, which we label as A_31..0.

In reality, there are many memory chips that are parts of memory. A large amount of memory is built from many memory chips. However, as far as the CPU is concerned, it can pretend that there is one monolithic memory chip (because of the interface memory provides). We'll do the same as well. We'll pretend there is one large 4 gigabyte memory chip.

Secondly, we need to tell memory whether we intend to read or write to memory. In this case, read and write are from the perspective of the CPU. Thus, to read from memory, means to get data out of the memory (so it can be sent to the CPU). This can be seen as a write from the perspective of memory. To write to memory means to get data into memory. This can be seen as a read from the perspective of memory.

We use the pin R/\W which is read as "read, not write". When R/\W = 1, we perform a read. When R/\W = 0, we perform a write. Usually, when we write something like \P we mean that P is active when 0 is input (this is also called active low). This is in contrast to writing it as P which is active when P is 1 (this is also called active high).

However, we don't always want to read or write. Sometimes we wish to do neither. (If we had to choose, it's better to do a read, since this does not update memory. However, reading makes the data bus unusable by other devices).

Thus, we have another input pin called CE for chip enable. Sometimes this pin is called chip select.

Since we do not write \CE, we assume CE is active high. That is, memory is enabled when CE = 1.

If CE = 0, then memory is disabled, which means memory ignores R/\W and performs neither a read, nor a write.

Finally, we need pins for the data. We assume these pins are bidirectional. They serve as input, when a write operation is being performed by the CPU (input to the memory chip, that is). They serve as output, when a read operation is being performed. They're ignored when the chip enable is not active.

We'll call these pins D_31..0.

There's one more output pin from memory called ACK, which is short for "acknowledgement". It's not obvious why you need to have such a pin. It's purpose is to be involved in a protocol between memory and CPU for reading from or writing to memory.

Legend of Pins

1. R/\W (read/not write) This is a one bit input that comes from the CPU. The CPU tells memory that it wants to perform a read by setting R/\W = 1. It tells memory that it wants to perform a write by setting R/\W = 0. However, memory only recognizes this bit when CE = 1.

2. CE (chip enable) When CE = 1, then the value of R/\W is processed by memory (and a read/write is performced). If CE = 0, memory neither reads nor writes. CE is 1 bit.

3. ACK (acknowledgement) This is normally set to 0. When a read or write is completed, ACK is set to 1. This wire is sent to the CPU. It is reset back to 0 when CE is set to 0. ACK is 1 bit.

4. A_31..0 (address bus). The CPU (or possibly another I/O device) outputs the address to read or write.

5. D_31..0 (data bus). If the CPU is performing a read (i.e., a load), then memory writes data onto the data bus at the address specified by the address bus. The CPU copies the data from the data bus to the CPU.

   If the CPU is performing a write (i.e., a store) then it writes the data onto data bus. Memory copies the value into the memory location specified by the address on the address bus.

   In both reads and writes, the CPU puts the address onto the address bus.

As you might guess, the address pins A_31..0 are hooked up the address bus (see the diagram of the computer at the top of this page).

The data pins D_31..0 are hooked up to the data bus (see the diagram of the computer at the top of this page).

What about R/\W and CE? These signals come directly from the CPU. So, the CPU isn't just hooked up to the data bus and the address bus. Assume there's a control bus where signals are sent between CPU and memory. There's three wires on this bus between CPU and memory: R/\W and CE go from CPU to memory. ACK goes from the memory to the CPU.

Speed refers to the amount of time it takes to perform a read or write. Compared to performing those same operations on a register, reads and writes to memory are really, really, really slow. (Even slower still is accessing disk, which is incredibly slow).

For example, the CPU needs to keep asserting the value CE = 1 until a read or write operation is completed. It must also continue to assert R/\W as well. The CPU must also assert the address to the address bus until the operation is complete.

If the CPU is doing a write, then it must assert the data on the data bus, until memory sends back ACK = 1. If the CPU is doing a read, memory must assert the data onto the data bus until CE is set to 0.

The two biggest hurdles to understanding hardware is that values must be asserted onto a wire or bus until the operation is complete (it's not like making a function call, where you have a discrete computation). The second concept is that "everything" in hardware can be performed in parallel. Programming teaches us to think sequentially, but hardware is usually done in parallel.

Think of hardware like a city, where there are many businesses carrying out their activities in parallel. Occasionally, for some businesses (like building a house), you may need to wait for someone else to do their job before you can do yours.

Similarly, in hardware, there are many devices doing things in parallel. Of course, they are all working together to run assembly language instructions.

Think of this as an interface (just like a Java class interface). This is how the CPU views memory. The actual implementation may involve many memory chips hooked up in such a way to give the illusion that there is one monolithic chip. This goes to show you that hardware has abstractions, just as software does.

The amount of memory in the CPU is very limited (roughly 128 bytes, due to 32 32-bit registers), so most information is stored in memory. Memory stores data, instructions, and garbage.

While certain regions of memory are reserved for code and other regions for data, the CPU basically distinguishes between code and data by context. This means there is no "tagging" or "labelling" of bits in memory. Thus, if you could inspect the binary values in memory, you would (in general) be unable to tell what the binary values stood for. The CPU generally assumes certain addresses contain data and certain addresses contain code. If these assumptions are incorrect, errors occur.

The CPU accesses information from memory sending addresses and control signals to memory. It may either send or receive data depending on whether a read or write operation is being performed.

Accessing memory is very slow compared to accessing registers which reside directly on the CPU. Registers can be accessed in about 0.25 ns while memory can be accessed in about 100 ns. Thus memory is about 400 times as slow as registers. Despite the speed (or lack thereof) of memory, the CPU must access memory because the CPU has very little memory of its own.

An ISA defines the machine and assembly code used by a CPU.

ISA stands for "Instruction Set Architecture". Effectively, the ISA is the programmer's view of the computer.

An ISA consists of:

• The instruction set This is the set of instructions supported. This is the part that's usually called the assembly language.
• The register set This is the set of registers you can use. (There are other hidden registers which you can't use directly. They are used indirectly, however).
• The address space This is the set of memory addresses that can be used by your program.

The ISA is basically a hardware specification. It's the view of the hardware as seen by an assembly language programmer.

The ISP (instruction set processor) is an implementation of the ISA. There may be many implementations for a given ISA. For example, IA32 is the instruction set architecture for x86 processors. Intel has the Pentium and Celeron lines of CPUs that implement this ISA. AMD also has its own CPUs that implement the ISA. Each implementation is different, but they all run code written in IA32.

There are two ways to write instructions. Either you can write them in assembly language, which is human-readable. Or you can write them in machine code, which is basically, 0's and 1's. CPUs process machine code, but humans usually program in assembly language.

You need to know both, in order to understand how a CPU works.

The "32" in MIPS32 refers to the size of the registers (i.e., how many bits each register holds) and to the number of bits used in an address. There is also a MIPS64, which has 64 bit addresses and 64 bit registers.

The MIPS32 architecture contains 32 general purpose int registers. The registers are named $r0, $r1, ..., $r31. Each register can store 32 bits. Most of the times the registers either store signed or unsigned ints. However, sometimes they store addresses, and occasionally ASCII characters, etc.

MIPS also has 32 floating point registers, but we won't worry about them too much.

Unlike programming languages where you can declare as many variables as you want, you can't create any more registers. The number of registers doesn't change.

MIPS32 allows you to access data in memory using 32 bit addresses. In principle, you can access up to 2³² different addresses, using 32 bits. In practice, some of those addresses may be invalid. For example, the CPU may simply not have that much memory (2³² addresses is 4 GB). Thus, you might be able to generate the 32-bit address, but there may be nothing stored at that address (an error usually occurs when you access an invalid address).

In MIPS, nearly all registers are general purpose. You can classify ISAs into those that use general purpose registers (i.e., instructions can refer to any register---all registers perform the same operations) or special purpose (certain instructions can only be used on specific, i.e., not all, registers).

However, there is at least one exception. $r0 is not general purpose. It is hardwired to 0. No matter what you do to this register, it always has a value of 0. You might wonder why such a register is needed in MIPS.

The designers of MIPS used benchmarks (programs used to determine the performance of a CPU), which convinced them that having a register hardwired to 0 would improve the performance (speed) of the CPU as opposed to not having it. Not everyone agrees a register hardwired to 0 is essential, so not all ISAs have a zero register.

0000 0000 0101 1000 0000 0000 0101 1000
1010 1101 0000 1011 1000 1100 1001 0110

This is called machine code.

As you might imagine, machine code was difficult to read and difficult to debug. The amount of time wasted trying to find whether you had accidentally written a 0 instead of a 1, lead to the invention of assembly language.

Assembly language is a somewhat more human-readable version of machine code. For example, assembly code might look something like:

add   $r2, $r3, $r4
addi  $r2, $r3, -10

While you may not understand the code above, you've certainly got a much better chance of figuring it out than the machine code equivalent. Each line of assembly code contains an instruction. Each instruction tells the computer one small task to accomplish. Instructions are the building blocks of programs.

CPUs can't handle assembly code directly. Instead, assembly code is translated to machine code. If this sounds like compiling, that's because it basically is comiling. However, people usually call the process of translating assembly to machine code assembling, instead of compiling.

You'll write code in assembly, and learn how to translate some instructions from assembly to machine code. It's very important that you understand the machine code, because that's what the CPU processes. Furthemore, by studying machine code, you get to see how information is encoded into 0's and 1's, and you get to see how the CPU uses these binary values to execute the instruction in hardware.

You need k = ceil( lg N ) bits to uniquely label N items.

MIPS32 has 32 integer registers. We want to label each register by a number, so instructions can refer to registers by number. Since MIPS has 32 registers, you need ceil( lg 32 ) = 5 bits.

If we think of the 5 bit numbers as unsigned binary numbers, then the registers are numbered from 0 up to 31, inclusive. In fact, that's exactly how MIPS numbers its registers. Registers are numbered from $r0 up to $r31. The binary equivalent are numbered from 00000 to 11111.

In assembly language, you'd write $r6. In machine code, you'd write the same register as: 00110. In assembly language, you'd write $r30. In machine code, you'd write 11110.

This is important because we're going to use register encoding in the machine language instructions for MIPS. Recall that machine code is a 32-bit bitstring. When we refer to registers within the instruction, it's going to be using the 5 bit binary numbers written in UB (unsigned binary).

Like C functions, arguments of assembly language instructions have type. Or at least, something that resembles type. Basically, there are 4 kinds of "types" for MIPS.

• Registers ($r0, $r1,..., $r31)

• Immediates Constants, such as, 10, -20, etc. Sometimes written in hexadecimal, e.g., 0x3a.

• Register Offset This is a constant and a register, written as -10($r3) or 214($r4). That is, you write the immediate (constant) value, then a left parenthesis, then a register, then a right parenthesis.

  The computation is performed by adding the contents of the register to the offset, usually resulting in a 32 bit address. Thus, -10($r3) is -10 added to the contents of register 3. This result is "temporary" and register 3 is not modified (just like x + y in a programming language merely adds x to y, but the sum does not change x or y

• Labels There are identifiers to locations in memory. Generally, you write labels in uppercase letters and underscores, such as FOR_LOOP.

For the most part, we'll only consider registers and immediate values.

Let's consider two examples of instructions and their operands:

• add $r2, $r3, $r4 This instruction adds the contents of register 3 and register 4, and places the result in register. It's basically R[2] = R[3] + R[4], if you pretend that the registers form an array.

• addi $r2, $r3, -10 This instruction adds the contents of register 3 to -10 and places the result in register 2. It's basically R[2] = R[3] - 10

The first instruction is an add instruction. add requires exactly 3 operands (arguments). Each operand must be a valid register. The operand can not be anything besides a register. In particular, you can not create expressions such as:

# WRONG! Operands can't be expressions
add $r2, $r3, (add $r4, $r5, $r6) 

There is a reason for this restriction in value, which we will discuss momentarily.

Unlike higher level programming languages, you can't create new registers. You're forced to use the ones available. You can't create new instructions either. You must use the ones provided in the instruction set.

• opcode This is a binary representation of the instruction. For example, an add instruction has an opcode of 000 000.
• operands Operands means the same thing as arguments. It's older terminology usually associated with assembly/machine code instructions.

MIPS divides instructions into three formats. Instructions are either R-type (register type), I-type (immediate type), or J-type (jump type). The types refer to the format, not to its purpose. (For example, branch instructions are I-type, because of its format, even if it would seem like it should be J-type).

Here are the layouts of the three kinds of instructions.

R-type Instruction

• R-type instructions are short for "register type" instructions.
• Bits B_31..26 are used for the opcode. For R-type instructions, the opcode is almost always 000 000. Normally, this makes no sense, because every instruction should have a unique opcode. However, bits B_5..0 (the function part) uses 6 bits to specify the instruction. Only R-type instruction uses a function.
• Bits B_25..21 specify a 5-bit UB encoding for the first source register.
• Bits B_20..16 specify a 5-bit UB encoding for the second source register.
• Bits B_15..11 specify a 5-bit UB encoding for the destination register. This specifies which register stores the result of the operation.
• Bits B_11..6 specify the shift amount. This is usually 00000, except for shift instructions.
• Bits B_5..0 specify a 6-bit function. Each R-type instruction has a unique 6 bit value. For example, add has a 6-bit value that's different from sub. add and sub are two different instructions.

I-type Instruction

• I-type instructions are short for "immediate type" instructions.
• Bits B_31..26 are used for the opcode. Unlike R-type instructions, the 6-bit value is NOT 000 000. There is no function code for I-type instructions.
• Bits B_25..21 specify a 5-bit UB encoding for the source register.
• Bits B_20..16 specify a 5-bit UB encoding for the destination register. Although this is called register t, instead of register d, it is treated as the destination register for I-type instructions.
• Bits B_15..0 is the 16-bit immediate value. This may be a 16-bit UB number or a 16-bit 2C number. Notice that the immediate value is encoded directly into the instruction.

J-type Instruction

• J-type instructions are short for "jump type" instructions.
• Bits B_31..26 are used for the opcode. Unlike R-type instructions, the 6-bit value is NOT 000 000. There is no function code for J-type instructions.
• Bits B_25..0 are used for the offset. This is usually used to generate an address.

Notice that the J-type instruction has no source or destination registers.

add $rd, $rs, $rt

In assembly language, the instructions are written with the destination register (i.e. register d), then the first source register, (i.e. register s) then the second source register (i.e. register t).

Note: This is NOT the same order as it is written in machine code. In assembly, it's destination, source 1, source 2. In MIPS machine code, it's written source 1, source 2, destination.

Don't ask me why the MIPS folks did it that way. They just did.

Let's translate the following instruction into MIPS assembly.

add $r2, $r3, $r4

For add, the opcode is 000 000. The function code is 100 000. Since the shift amount isn't used, it's set to 00000.

We encode $r2 as 00010, $r3 as 00011, and $r4 as 00100.

This is how the machine code equivalent looks:

Again, notice that bits B_25..21 is source 1 (i.e., $r3), then B_20..16 is source 2 (i.e., $r4), then B_15..11 is the destination register (i.e., $r2).

It's important that you learn how to translate a few instructions, because the CPU manipulates the binary version of this, not the assembly version. In particular, pay attention to how the registers are encoded, and just as importantly, which bits refer to which registers.

The general format for an addi instruction is:

addi $rt, $rs, IMMED

Let's look at a specific example.

addi $r3, $r10, -3

This instruction adds the contents of register 10, to the value -3, and stores the result in register 3.

The opcode for addi is 001 000. In 2C, you write -3_ten as 1111 1111 1111 1101.

This is how the instruction is encoded.

Again, notice that in the assembly code $r3 (i.e., the destination register) appears first, while in the machine code $r3 appears second. Also, notice that the immediate value is written in 16 bits, two's complement.

Now that you see why it's written in 16 bits, 2C, you see why the immediate value can only be between -2^-15 through 2¹⁵ - 1. This is the range of valid values for 16 bit 2C.

The assembler must translate base 10 representation to 2C representation when translating addi from assembly to machine code.

Some instructions encode the immediate in 2C, while other instructions encode it in UB.

While it's useful to know how to program in MIPS assembly, it's isn't essential to understand how a CPU works. To understand how a CPU works, at least, initially, all you need to know is what an instruction looks like in binary, and what that individual instruction is supposed to do.

Registers are basically very fast memory. However, CPUs can only hold a limited number of registers. There are several reasons for it, ranging from how fast a CPU can be with too many registers, to the more important issue of how to specify which register you want to work with.

In the CPU we're building, we'll assume each register can store 32 bits. However, in our examples, we'll use 4 bits, only because it's easier to draw with 4 bits than 32.

Unlike programming languages, registers don't really have a type. Registers can store ASCII characters, memory addresses, signed integers, unsigned integers, etc. A register stores a 32 bit bitstring, and what that bitstring represents depends on the assembly language instructions that manipulate it.

One reason we talked about a clock is because a register is a clocked device. We'll explain more in the next section.

Here's a diagram of a parallel load register.

The register is the outer box. It has four bits of data inputs labelled b_3..0. It has four bits of output labelled z_3..0. It has a single control bit telling the parallel load register what to do. It has a clock input that tells it when to do it.

Inside the parallel load register, we see what appears to be an array. However, unlike the arrays you see in a programming language, the array is numbered from right to left. The rightmost element is indexed 0, while the leftmost box is indexed 3.

In reality, registers don't store "arrays", but to make the explanation easier to understand, just think of it as an array.

The following is a chart indicating how to use the control bit (labeled as c) to tell the parallel load register what to do.

A parallel load registers has two operations. It can hold. It can parallel load.

• hold The register keeps the same value in the array. It ignores the input values b_3..0.
• parallel load The register reads in the input values, b_3..0, and overwrites the values in the array. Thus, if b_3..0 = 0000 and the current value in the register is z_3..0 = 0110, then parallel loading the input would cause the register's content to become 0110, and the old values of the register would disappear.

The reason it is called a parallel load is because the bits are loaded in parallel. The other way to load bits is one at a time, i.e., sequentially. This is what happens when you copy an array. It is copied one element at a time.

The control bit, c, is used to tell the register whether to hold or to parallel load. If c = 0, the register holds. If the c = 1, the register parallel loads. However, this is only done when the clock signal is at a positive edge.

If you look at the third row of the chart above, the register also holds its value. When the clock signal is not at a positive edge, the register's value remains the same. It is holding its value.

However, when you deal with hardware, you need to think continously (and discretely too). In general, the register is always receiving some value for c. Again, think of a pipe being sent into the register.

There's always some red or green soda flowing in. That is, there's always a 0 or 1 being sent to the register using the c control input.

Most of the time, this control input is being ignored. However, when a positive edge occurs, the control input is "read" by the register (to determine which operation to perform), and either a parallel load or hold occurs.

Think of a register as a variable in a programming language. Do we assign to a variable all the time? No. We just assign to the variable when it needs to be assigned. Otherwise, variables would be changing all the time.

We don't always want a register to read the value all the time for the same reason we don't always want a variable to update all the time. Sometimes, we just want to keep the value of the register unchanged.

Here's another analogy. Many years ago, there were milk men who would deliver bottles (yes!) of milk to your house. They would come to your house once a day. However, depending on how fast you drink milk, or whether you're on vacation, you might not want to have milk delivered to you each day.

A system can be worked out between you and the milkman. If you've drunk all the milk, then you can put the empty bottle outside your door. The milkman sees an empty bottle, picks it up, and puts down a new bottle of milk.

On the other hand, if you haven't completed the milk, you don't leave the bottle outside. When the milkman drops by, he doesn't see a bottle of milk outside. So, he doesn't drop a new bottle of milk.

The milkman comes by once a day, which is similar to a positive edge occuring once a period. The milkman has two choices. Drop a new bottle of milk, or don't. If you didn't have this policy, then the milkman would keep dropping off more and more bottles of milk, and it would all go bad. So, there's some justification for not wanting milk to be dropped off each day.

What if you wanted milk to be delievered more often? Like twice a day, instead of once a day? This is analogous to speeding up the clock, and usually we don't have too much control over how fast the clock runs. Generally, you have the clock set at one rate, and that's that.

You just have to get used to the idea that a register is always outputting a value. The reason this doesn't cause a problem is because the rest of the CPU doesn't have to actually read the value from the register. Other devices can selectively ignore or read the values of the registers at selected times.

A register outputs a value. This value is needed by other devices in the CPU. For example, we may want to add the value of this register to the value of another register. A device called the ALU can perform this addition.

However, this addition isn't infinitely fast. Even though it's quick, it's not instantaneous. We must wait for the computation to complete. At that point, the result of the computation can be stored. This result is typically store in a register, possibly the same register that produced the value!

So, the clock is primarily used to allow the devices that need to perform computations the time it needs to do so, before updating the registers.

If you need to access memory (and you'll need to do this), you'll find memory is much, much, much slower to access than registers. Memory is perhaps 400 times as slow to access than registers.

To give you an idea of how much slower that is, suppose someone tells you they are going to come back in a minute. If they come back 400 times as slow, it will take them nearly 7 hours to return.

Clearly, you want to use registers when you can, because they are much faster than memory.

However, there is a problem. CPUs can only hold a limited number of registers. For the CPU we're going to consider, we have 32 32-bit registers. That's 128 bytes.

Typical RAMs on a PC have somewhere between 128 MB up to 1 G. This is at least 100,000 times more memory than registers. However, all that memory comes at a price. It's slow to access.

This is one of the facts about memory. The faster you want memory, the more it costs, and the less of it you can have. To think about why this might occur, let's use an analogy. Think of a city. Suppose it has 100 streets (with traffic lights) going north-south, and 100 streets going east-west. Imagine how long it might take to travel from one corner to the other.

Now imagine that you only have two streets going north-south, and two streets going east-west. It's much faster to travel in this small town, because there are far fewer streets, which you can place quite close together.

Similarly, the more registers you have, the more space it takes up on the CPU, and the more time it takes to access them merely because of the physical space it takes up. When you're trying to run a CPU as fast as possible, these things become important.

You can tell a register whether to parallel load or to hold a value by setting the value of c the control bit to 1 or 0, respectively.

However, this bit is only read at the positive clock edge. If you do not have the value of c set to the value you want when the positive edge occurs

(Actually you need to have the value a short time before the edge occurs, and this value must persis to a short time after the edge occurs. The actual amount of time needed depends on the register itself, and is usually part of the technical specifications for the register)

In particular, I want to show you how to build a computer. This isn't a real computer, but it's not exactly fake either. A real computer requires many features to make it run fast, to interact with the keyboard, the mouse, the Internet, and so forth. All of those peripherals are very important when it comes to using a computer, and yet, they are really only secondary when it comes to understanding how a computer fundamentally works.

The computer we'll build is not one you can buy from a store, or from someplace online. You'll never play a game, or watch a video, or write and compile a program on this computer.

The purpose is to "build" a very rudimentary computer, and to make you believe that this computer could possibly work. Many details are left out. For example, we don't worry about very low level details. Silicon and semiconductor physics are not the point of this exercise.

We'll work at a more abstract level, concerning ourselves with registers, wires, combinational and sequential logic devices. While these may not make any sense to you know, they should become clearer later on.

We're not going to worry about how to make a computer run fast either. So our system doesn't include any caches, or pipelines. Nevertheless, by understanding the computer we build, you should have enough understanding to see how a more efficient computer can be built.

Our goal is to build a CPU that can run a small subset MIPS32 ISA. Why MIPS32? Of all ISAs, MIPS32 is very simple. Simple doesn't mean bad. In fact, simple, in this case, means it can be efficient. It's also great for instruction purposes because it's easier to understand than IA32 (the instruction set for x86).

We pick one ISA because this makes life simple. I could talk about half a dozen different ISAs, but that's like discussing half a dozen different programming languages. In the end, you know 6 programming languages badly, instead of one programming language well. By concetrating on one example, you learn how it works, and then you have something to compare it to when you learn other ISAs.

The CPU consists of several parts.

• registers

  Registers are very fast memory on the CPU. The CPU we're considering consists of 32 32-bit registers. We'll label them $r0 through $r31.

• ALU

Instructions are part of an ISA (instruction set architecture). An ISA tells you a valid set of instructions. The actual CPU runs those instructions. Think of an ISA as a kind of specification and the actual CPU as the implementation of the specifications.

The individual steps for running a single instructions is:

• Fetch an instrution

  We assume all programs are stored in memory. We get an instruction, one at a time, and copy it from memory to the CPU. This instruction is copied to a special register called the instruction register, or IR, for short.

  A typical ISA instruction is add $r2, $r3, $r4 which adds the contents of register 3 to the contents of register 4, and stores the result into register 2 (overwriting the previous contents of register 2).

  Note that this instruction is written in pseudo-English, much like C++ code is written in pseudo-English. The CPU processes a binary translation of this instruction. The actual instruction is really a 32-bit bitstring which stands for the add instruction.

• Decode an instrution/Operand Fetch

  Once the instruction is in the CPU, the CPU has to figure out what instruction was fetched. Based on the binary pattern of the instruction, the CPU begins to fetch operands.

  Think of an instruction as a function. The operands are the arguments to the function. For the most part, the operands are stored in registers, so the CPU must get the data from the registers so it can be processed.

• Execute instruction using ALU

  The ALU (arithmetic-logic unit) is a combinational logic device that performs operations based on some control inputs. For example, an ALU can add, subtract, do bitwise operations, and so forth. You tell the ALU what to do by setting the control bits correctly. If you change the control bits, the operation of the ALU also changes.

  The ALU has two 32-bit inputs. The inputs of the ALU can come from anywhere, but in the CPU we're talking about, it comes from two registers from the register file.

  For example, the contents of $r3 and $r4 can be fed in as inputs into the ALU. The ALU also has control inputs to tell it what to do. The CPU can set the control inputs so the ALU performs, say, addition, on its inputs.

  The ALU has a 32-bit output, which is the result of performing the operation on the input.

• Memory Access (for loads and stores)

  The only instructions that interact with memory are load and store. This occurs at this step. This step is skipped for other instructions. However, load and stores are important enough to mention them at this step. We'll see why it has to be at this step.

• Write Back to Register File

  The result of the ALU is stored at some register specified by the instruction. For example, in the instruction add $r2, $r3, $r4, the result is stored in the first register, which is $r2

• Update PC

  The PC (program counter) stores the address of the next instruction to be fetched. Normally this is the address of the old instruction plus 4.

• hidden registers: PC (program counter) and IR (instruction register) plus a few more registers.
• the register file this device contains the user-visible registers, i.e., registers $r0 through $r31.
• memory this is where the instructions and data are stored
• ALU this performs arithmetic or logical operations on data stored in the register.
• various parts We'll also use wires, other registers, multiplexers, and a few other devices.

We begin by understanding the following parts:

• What a wire is
• What a bus is
• What a clock is
• What a register is
• What a register file is
• What an ALU is

• What is a computer?
• What are registers?
• What is an ALU?
• What is memory?

It's useful to think of the wire like a pipe which you can send soda. Let's pretend a device can send two kinds of soda. If a device pumps red soda, then the wire is transmitting a 0. If a device pumps green soda, the wire is transmitting a 1.

A device can also pump no soda at all. In this case, the wire is at high impedance, which means it has neither value 0 or 1 (or perhaps more precisely, it has a random value of 0 or 1, which changes depending on when it is read).

When a device is pumping soda into the pipe, it can only pump red or green soda. No other device is allowed to pump soda onto the same wire. If some other device attempts to pump soda, then the wire will contain a garbage value. We assume there is a garbage value even if two devices are pumping soda of the same color.

The device that is pumping the soda is said to write a a value to the wire. We want to guarantee that there is, at most, single writer (there may be none).

Devices may "read" the wire as well. The device can "sample" the soda, and determine if it's red or green. If the device attempts to read the value of a pipe when it is empty, or if the device attempts to read the value when two or more devices attempt to pump soda, then we assume the value read is random. That is, it can either be a 0 or a 1, but we don't know which, and this value can change.

In order for us to make a stable system, we want devices reading when a pipe contains soda pumped by a single device.

More than one device can read from the wire, but at most one device can write to the wire.

When you learn to program, you often think of values in discrete units. For example, suppose you want to run the statement: z = foo( x + y ). You think of x + y being computed, then this value sent to foo, then foo computing a return value, and this return value being stored in z.

Each event occurs in a discrete step.

However, it's better to think of a wire like water being sent to your home, or like electricity flowing down the wires. It's constantly flowing. This creates a more accurate image of what's happening in a circuit.

In reality, electrons are floating at some potential of either 0 or 5 volts (though these days, it's sometimes 3.3 volts) where 0 volts represents the bit 0, and 5 volts represents the value 1. If no voltage is asserted on the wire, the the voltage is ambiguous and essentially "floats".

These electrons are flowing through the wire, and devices can measure the potential of the wire to determine if there is a 0 or 1 on the wire.

We want to avoid two devices trying to assert (i.e. "write") voltages on the wires.

The following chart describes the behavior.

The output is one of four values: 0, 1, Z, and ?. 0 and 1 should be obvious.

? occurs when two devices attempt to write to the wire at the same time. When a device reads from the bus it reads a value that's either 0 or 1, so it's unknown. We want to avoid having two devices write at the same time.

Z means that no device is writing to the wire. Reading a value from the wire also results in a value that's 0 or 1, but it's not known which. We want to avoid having a device read the wire when no device is writing to a wire.